Hardware-assisted Incremental Checkpointing in Speculative Parallel Discrete Event Simulation

Stefano Carnà, Serena Ferracci, Emanuele De Santis, Alessandro Pellegrini, and Francesco Quaglia

Published in: Proceedings of the 2019 Winter Simulation Conference
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Nowadays hardware platforms offer a plethora of innovative facities for profiling the execution of programs. Most of them have been exploited as tools for program characterization, thus being used as kind of program-external observers. In this article we take the opposite perspective where hardware profiling facilities are exploited to execute core functional tasks for the correct and efficient execution of speculative Parallel Discrete Event Simulation (PDES) applications. In more detail we exploit them—specifically, the ones offered by Intel x86-64 processors—to build a hardware-supported incremental checkpointing solution that enables the reduction of the event-execution cost in speculative PDES compared to the software-based counterpart. We integrated our solution in the open source ROOT-Sim runtime environment, thus making it available for exploitation.

BibTeX Entry:

author = {Carnà, Stefano and Ferracci, Serena and De Santis, Emanuele and Pellegrini, Alessandro and Quaglia, Francesco},
booktitle = {Proceedings of the 2019 Winter Simulation Conference},
title = {Hardware-assisted Incremental Checkpointing in Speculative Parallel Discrete Event Simulation},
year = {2019},
month = dec,
publisher = {IEEE},
series = {WSC},
location = {Washington, DC, USA}